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| ICM7242 November 1996 Long Range Fixed Timer Description The ICM7242 is a CMOS timer/counter circuit consisting of an RC oscillator followed by an 8-bit binary counter. It will replace the 2242 in most applications, with a significant reduction in the number of external components. Three outputs are provided. They are the oscillator output, and buffered outputs from the first and eighth counters. Features * Replaces the 2242 in Most Applications * Timing From Microseconds to Days * Cascadable * Monostable or Astable Operation * Wide Supply Voltage Range . . . . . . . . . . . . . . 2V to 16V * Low Supply Current. . . . . . . . . . . . . . . . . . . 115A at 5V Ordering Information PART NUMBER (BRAND) ICM7242IPA ICM7242CBA (7242CBA) TEMP. RANGE (oC) -25 to 85 0 to 70 PACKAGE 8 Ld PDIP 8 Ld SOIC PKG. NO. E8.3 M8.15 Pinout ICM7242 (PDIP, SOIC) TOP VIEW VDD 1 2 3 4 8 7 6 5 TB I/O RC TRIGGER RESET /2 OUT /128/256 OUT VSS Functional Diagram R1 50K CL + R2 86K S Q CL Q S Q CL Q S Q CL Q S Q Q + R S R Q Q CL Q S Q CL 7 RC R3 50K - Q CL Q S S Q CL Q S Q Q 1 VDD 4 VSS 8 TB I/O 5 RESET 6 TRIGGER 2 3 OUTPUT /2 OUT /128/256 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999 File Number 2866.2 8-163 ICM7242 Absolute Maximum Ratings Supply Voltage (VDD to VSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V Input Voltage (Note 1) Terminals (Pins 5, 6, 7, 8) . . . . . . . . . .(VSS -0.3V) to (VDD +0.3V) Continuous Output Current (Each Output) . . . . . . . . . . . . . . . . 50mA Thermal Information Thermal Resistance (Typical, Note 2) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160 Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Junction Temperature (Plastic Package) . . . . . . . . 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only) Operating Conditions Temperature Range ICM7242I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC ICM7242C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Due to the SCR structure inherent in the CMOS process, connecting any terminal to voltages greater than VDD or less than VSS may cause destructive device latchup. For this reason, it is recommended that no inputs from external sources not operating on the same supply be applied to the device before its supply is established and, that in multiple supply systems, the supply to the ICM7242 be turned on first. 2. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications PARAMETER Guaranteed Supply Voltage Supply Current VDD = 5V, TA = 25oC, R = 10k, C = 0.1F, VSS = 0V, Unless Otherwise Specified SYMBOL VDD IDD Reset Operating, R = 10k, C = 0.1F Operating, R = 1M, C = 0.1F TB Inhibited, RC Connected to VSS TEST CONDITIONS MIN 2 f/t VOTB Independent of RC Components ISOURCE = 100A ISINK = 1.0mA VDD = 2V VDD = 5V VDD = 15V 50% Duty Cycle Input with Peak to Peak Voltages Equal to VDD and VSS Counter/Divider Mode 2 TYP 125 340 220 225 5 250 3.5 0.40 1.6 3.5 1.3 2.7 10 1 6 13 MAX 16 800 600 25 2.0 4.5 2.0 4.0 UNITS V A A A A % ppm/oC V V A V V V V A MHz MHz MHz Timing Accuracy RC Oscillator Frequency Temperature Drift Time Base Output Voltage Time Base Output Leakage Current Trigger Input Voltage ITBLK VTRIG RC = Ground VDD = 5V VDD = 15V Reset Input Voltage VRST VDD = 5V VDD = 15V Trigger/Reset Input Current Max Count Toggle Rate ITRIG, IRST fT Output Saturation Voltage Output Sourcing Current MIN Timing Capacitor (Note 3) Timing Resistor Range (Note 3) NOTE: 3. For design only, not tested. VSAT ISOURCE CT RT All Outputs Except TB Output VDD = 5V, IOUT = 3.2mA VDD = 5V Terminals 2 and 3, VOUT = 1V 10 0.22 300 - 0.4 22M V A pF VDD = 2 - 16V 1K 8-164 ICM7242 Test Circuit VDD 1 8 7 6 5 RESET TRIGGER TIME BASE PERIOD = 1.0RC; 1s = 1M x 1F C R TIME BASE INPUT/OUTPUT VDD /21 (RC/2) OUTPUT /28 (RC/256) OUTPUT 2 3 4 NOTE: 4. /21 and /28 outputs are inverters and have active pullups. Application Information Operating Considerations Shorting the RC terminal or output terminals to VDD may exceed dissipation ratings and/or maximum DC current limits (especially at high supply voltages). There is a limitation of 50pF maximum loading on the TB I/O terminal if the timebase is being used to drive the counter section. If higher value loading is used, the counter sections may miscount. For greatest accuracy, use timing component values shown in Figure 8. For highest frequency operation it will be desirable to use very low values for the capacitor; accuracy will decrease for oscillator frequencies in excess of 200kHz. The timing capacitor should be connected between the RC pin and the positive supply rail, VDD , as shown in Figure 1. When system power is turned off, any charge remaining on the capacitor will be discharged to ground through a large internal diode between the RC node and VSS. Do NOT reference the timing capacitor to ground, since there is no high current path in this direction to safely discharge the capacitor when power is turned off. The discharge current from such a configuration could potentially damage the device. When driving the counter section from an external clock, the optimum drive waveform is a square wave with an amplitude equal to the supply voltage. If the clock is a very slow ramp triangular, sine wave, etc., it will be necessary to "square up" the waveform; this can be done by using two CMOS inverters in series, operating from the same supply voltage as the ICM7242. The ICM7242 is a non-programmable timer whose principal applications will be very low frequency oscillators and long range timers; it makes a much better low frequency oscillator/timer than a 555 or ICM7555, because of the on-chip 8-bit counter. Also, devices can be cascaded to produce extremely low frequency signals. Because outputs will not be ANDed, output inverters are used instead of open drain N-Channel transistors, and the external resistors used for the 2242 will not be required for the ICM7242. The ICM7242 will, however, plug into a socket for the 2242 having these resistors. The timing diagram for the ICM7242 is shown in Figure 1. Assuming that the device is in the RESET mode, which occurs on power up or after a positive signal on the RESET terminal (if TRIGGER is low), a positive edge on the trigger input signal will initiate normal operation. The discharge transistor turns on, discharging the timing capacitor C, and all the flip-flops in the counter chain change states. Thus, the outputs on terminals 2 and 3 change from high to low states. After 128 negative timebase edges, the /28 output returns to the high state. TRIGGER INPUT (TERMINAL 6) TIMEBASE INPUT (TERMINAL 8) / 2 OUTPUT (TERMINAL 2) / 128/256 OUTPUT (TERMINAL 3) (ASTABLE OR "FREE RUN" MODE) / 128/256 OUTPUT (TERMINAL 3) (MONOSTABLE OR "ONE SHOT" MODE) 128RC 128RC 128RC FIGURE 1. TIMING DIAGRAMS OF OUTPUT WAVEFORMS FOR THE ICM7242 (COMPARE WITH FIGURE 5) VDD 1 fIN/2 OUTPUTS fIN/256 2 3 4 8 7 6 fIN 3/4 (V+) 1/4 (V+) VDD 5 FIGURE 2. USING THE ICM7242 AS A RIPPLE COUNTER (DIVIDER) 8-165 ICM7242 To use the 8-bit counter without the timebase, Terminal 7 (RC) should be connected to ground and the outputs taken from Terminals 2 and 3. The ICM7242 may be used for a very low frequency square wave reference. For this application the timing components are more convenient than those that would be required by a 555 timer. For very low frequencies, devices may be cascaded (see Figure 3). VDD 1 2 ICM7242 3 4 6 5 3 4 8 7 R C 2 ICM7242 6 5 7 1 8 Comparing the ICM7242 With the 2242 ICM7242 Operating Voltage Operating Temperature Range Supply Current, VDD = 5V Pullup Resistors TB Output No No No 3.0MHz No No No Yes Yes Yes 0.5MHz Yes Yes Sometimes 2V - 16V -25oC to 85oC 0.7mA (Max) 2242 4V - 15V 0oC to 70oC 7mA (Max) /2 Output /256 Output Toggle Rate Resistor to Inhibit Oscillator Resistor in Series with Reset for Monostable Operation f = RC/216 FIGURE 3. LOW FREQUENCY REFERENCE (OSCILLATOR) Capacitor TB Terminal for HF Operation For monostable operation the /28 output is connected to the RESET terminal. A positive edge on TRIGGER initiates the cycle (NOTE: TRIGGER overrides RESET). By selection of R and C, a wide variety of sequence timing can be realized. A typical flow chart for a machine tool controller could be as shown in Figure 5. TRIGGERING CAN BE OBTAINED FROM A PREVIOUS STAGE, A LIMIT SWITCH, OPERATOR SWITCH, ETC. ICM7242 START WAIT 5s ICM7242 ENABLE 10s VDD R C 1 2 ICM7242 OUTPUT 3 4 8 7 6 5 100k S1 STOP TRIGGER RESET START WAIT 5s ENABLE 10s ENABLE 5s ICM7242 COUNT TO 185 ICM7240 WAIT 5s ICM7242 STOP WAIT 5s COUNT TO 185 ENABLE 5s TRIGGER TERMINAL 6 FIGURE 5. FLOW CHART FOR MACHINE TOOL CONTROLLER TB OUTPUT OUTPUT TERMINAL 8 TERMINAL 3 FIGURE 4. MONOSTABLE OPERATION The ICM7242 is superior in all respects to the 2242 except for initial accuracy and oscillator stability. This is primarily due to the fact that high value p- resistors have been used on the ICM7242 to provide the comparator timing points. By cascading devices, use of low cost CMOS AND/OR gates and appropriate RC delays between stages, numerous sequential control variations can be obtained. Typical applications include injection molding machine controllers, phonograph record production machines, automatic sequencers (no metal contacts or moving parts), milling machine controllers, process timers, automatic lubrication systems, etc. Sequence Timing * Process Control * Machine Automation * Electro-Pneumatic Drivers * Multi Operation (Serial or Parallel Controlling) 8-166 ICM7242 VDD VDD VDD VDD TRIGGER VDD 6 S1 50K R (NOTE) C 3 33K 5 100pF A 1F 6 10K R (NOTE) C 3 33K 5 100pF B 1F 6 10K R (NOTE) C 3 33K 5 100pF C 1F 6 10K R (NOTE) C 3 33K 5 100pF D ICM7242 A ICM7242 B ICM7242 C ICM7242 D PUSH S1 TO START SEQUENCE: MUST BE SHORTER THAN "ON TIMEA" TRIGGER 128RC OUTPUT A (NOTE) 128RC OUTPUT B (NOTE) 128RC OUTPUT C (NOTE) 128RC OUTPUT D (NOTE) ON TIMEC ON TIMEA ON TIMEB ON TIMED NOTE: Select RC values for desired "ON TIME" for each ICM7242. FIGURE 6. SEQUENCE TIMER 8-167 ICM7242 Typical Performance Curves 260 240 220 SUPPLY CURRENT (A) 200 180 160 140 120 100 80 60 40 20 0 0 2 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 100 100pF 0.001 0.01 0.1 1 10 100 RESET MODE TA = 75oC TA = 25oC TA = -20oC TIMING RESISTOR, R () 10M 1M 100k 10k 1k TA = 25oC 1000 10,000 RECOMMENDED RANGE OF TIMING COMPONENT VALUES 100M TIMING CAPACITOR, C (F) FIGURE 7. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 8. RECOMMENDED RANGE OF TIMING COMPONENT VALUES FOR ACCURATE TIMING 10,000 1,000 100 CAPACITANCE (F) 10 1 0.1 0.01 0.001 100p 10p 1p 0.1 1 10 100 1K 10K 100K 1M 10M 10M 1M 1k 100k 10k VDD = 5.0V TRIGGER PULSE WIDTH (ns) TA = 25oC 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 0 TA = 25oC VDD = 16V VDD = 5V VDD = 2V 1 2 3 4 5 6 7 8 9 10 TIME BASE FREQUENCY (Hz) TRIGGER AMPLITUDE (V) FIGURE 9. TIMEBASE FREE RUNNING FREQUENCY vs R AND C FIGURE 10. MINIMUM TRIGGER PULSE WIDTH vs TRIGGER AMPLITUDE 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 0 1 2 TA = 25oC NORMALIZED FREQUENCY DEVIATION (%) +10.0 +8.0 +6.0 +4.0 +2.0 0.0 -2.0 -4.0 -6.0 -8.0 -10.0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) 16 18 20 TA = 25oC R 10k 1M 1k 100k 10k 100k C 0.001F 100pF 0.1F 0.001F 0.01F 0.01F RESET PULSE WIDTH (ns) VDD = 5V VDD = 2V VDD = 16V 3 4 5 6 7 RESET AMPLITUDE (V) 8 9 10 FIGURE 11. MINIMUM RESET PULSE WIDTH vs RESET AMPLITUDE FIGURE 12. NORMALIZED FREQUENCY STABILITY IN THE ASTABLE MODE vs SUPPLY VOLTAGE 8-168 ICM7242 Typical Performance Curves NORMALIZED FREQUENCY DEVIATION (%) +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -25 0 25 TEMPERATURE (oC) 50 75 R = 1k C = 0.1F 5V VDD 15V R = 10M C = 0.1F MAXIMUM DIVIDER FREQUENCY (Hz) (Continued) 100M 10M TA = 25oC RC CONNECTED TO GROUND 1M 100K 10K 0 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) FIGURE 13. NORMALIZED FREQUENCY STABILITY IN THE ASTABLE MODE vs TEMPERATURE FIGURE 14. MAXIMUM DIVIDER FREQUENCY vs SUPPLY VOLTAGE 100 DISCHARGE SINK CURRENT (mA) OUTPUT SATURATION CURRENT (mA) TA = 25oC VDD = 15V VDD = 5V 100 TA = 25oC VDD = 15V VDD = 5V 10 10 VDD = 2V 1 VDD = 2V 1 0.1 0.01 0.1 1 10 0.1 0.01 0.1 1 10 DISCHARGE SATURATION VOLTAGE (V) OUTPUT SATURATION VOLTAGE (V) FIGURE 15. DISCHARGE OUTPUT CURRENT vs DISCHARGE OUTPUT VOLTAGE FIGURE 16. OUTPUT SATURATION CURRENT vs OUTPUT SATURATION VOLTAGE 8-169 |
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